J͏ob Description
Do
- experience in ASIC/DFT - simulation and Silicon validation.
- Should have worked in at least one Full chip DFT
- Detailed knowledge on DFT concepts, pattern simulation, Silicon debug and yield enhancement.
- In-depth knowledge and hands-on experience in ATPG - coverage analysis.
- In-depth knowledge of Memory verification, repair and failure root-cause analysis.
- Experience with any of these tools is required: ATPG - TestKompress, MBIST - MentorETVerify, Simulation - VCS (preferred), ModelSim.
- Expertise in scripting languages such as Perl, shell, etc. is an added advantage.
- Ability to work in an international team, dynamic environment with good communication skills.
- Ability to learn and adapt to new tools, methodologies.
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Deliver
| No. | Performance Parameter | Measure |
| 1. | Verification | Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) |
| 2. | Self-development | Skill test for next level clearance on Trend Nxt |
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Experience: 3-5 Years .
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