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Key Responsibilities:
• Own FA pipeline for NPI and MP builds
• Take ownership of failed units once CM NPI/MP yield reports are released; prioritize based on yield and customer impact.
• Triage failures, classify by failure type (HW, test, process, system), and coordinate board movement and tracking.
• Execute standard FA flow: visual inspection, repro of failure, electrical characterization, and isolation to device/board/test/process root cause.
• Use tools such as MODS/diags, shmoos (voltage/frequency/temperature), floor-sweeping of GPU resources, voltage margining, packet and link‑level debug, etc., to characterize intermittent and marginalities.
• Prepare and execute debug experiments on host systems (remote access, scripting, automation) to reproduce and narrow failure signatures.
• File and manage NV bugs in the correct modules (e.g., BoardOps, BrdSoln) for every HW failure, with clear symptom, conditions, logs, and suspected scope.
• Own bug lifecycle: driving reproducer clarity, experiments, and data needed by PDE/design, closing with well‑documented root cause and corrective action.
• Partner with PDE, design, test, quality, CM test/FXN, and component vendors to converge root cause and implement robust fixes in design, test content, or process.
• Provide FA input to FRR / factory readiness, test plans, and manufacturing control plans so that known risks are screened at scale.
• Summarize FA learnings into Pareto, yield detractors, and systemic issue patterns for PE/PDE and Ops leadership.
• Recommend and help implement improvements: test limits, new screens, process changes, design ECOs, and alternative components where appropriate.
Qualifications & Skills
• BS/MS in Electrical Engineering, Computer Engineering, Physics, or related field.
• Experience in board/system debug, semiconductor test, or product/FA engineering (NPI and/or HVM) strongly preferred
• Strong understanding of digital/SoC/GPU boards, power, high‑speed interfaces, and manufacturing test flows.
• Hands‑on experience with lab tools (scope, DMM, logic analyzer, JTAG, boundary scan) and factory diagnostics / MODS / burn‑in / stress tests.
• Ability to read schematics, BOMs, and layout, and correlate to failure signatures.
• Comfortable with Linux command line, scripting (e.g., Python/Perl), and remote lab access tools for automation and data extraction.
Soft Skills:
• Strong root‑cause thinking, able to design experiments that separate board vs. silicon vs. test vs. process issues.
• Clear written and verbal communication for cross‑site teams, including concise FA summaries for executives and design owners.
• Ability to manage multiple FA tasks in parallel, prioritize by yield/customer impact, and work closely with CMs under tight build schedules.
Experience: 3-5 Years .
The expected compensation for this role ranges from $45,000 to $121,000 .
Final compensation will depend on various factors, including your geographical location, minimum wage obligations, skills, and relevant experience. Based on the position, the role is also eligible for Wipro's standard benefits including a full range of medical and dental benefits options, disability insurance, paid time off (inclusive of sick leave), other paid and unpaid leave options.
Applicants are advised that employment in some roles may be conditioned on successful completion of a post-offer drug screening, subject to applicable state law.
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