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Own and deliver RTL2GDSII for multiple partitions
Handle complete PD flow including:
Synthesis
Floorplanning, Placement, CTS
Routing and optimization
Timing closure across all corners
Perform and close signoff checks, including:
VCLP
IR / RV
FEV
LVS / DRC
Work independently with minimal supervision
Drive issue resolution for timing, congestion, power, and physical verification
Communicate effectively with internal teams and stakeholders
Skill Requirements
Strong hands‑on experience in:
PNR
Timing closure
Physical signoff
Proven ability to own blocks independently
Good communication and coordination skills
Experience
5+ years of relevant experience in ASIC Physical Design
Experience: 3-5 Years .
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